Network test systems, such as network load testing systems and application test systems, can be used to simulate various network traffic conditions in both laboratory and live-network environments. The test packet generation and analysis functions provided by these test systems are processor resource-intensive, and consequently, consume a significant amount of power. However, in some instances, a network test system may be in an idle up to 50% of its operating time. Although a network test system may be in an idle state, the load modules (e.g., processor cards/blades) are typically powered during this idle state. If power usage by the load module can be minimized during this idle time, the potential annual savings for a single network test equipment (NTE) chassis would be significant. Additional savings may also be possible if hardware cooling needs are considered. Given the size of some internal test equipment laboratories, the ability to minimize power consumption during idle periods could result in considerable annual savings power costs.
Accordingly, in light of these difficulties, a need exists for methods, systems, and computer readable media for controlling processor card power consumption in a network test equipment chassis that includes a plurality of processor cards.